Formalizing Cyber--Physical System Model Transformation via Abstract Interpretation

Model transformation tools assist system designers by reducing the labor--intensive task of creating and updating models of various aspects of systems, ensuring that modeling assumptions remain consistent across every model of a system, and identifying constraints on system design imposed by these modeling assumptions. We have proposed a model transformation approach based on abstract interpretation, a static program analysis technique. Abstract interpretation allows us to define transformations that are provably correct and specific. This work develops the foundations of this approach to model transformation. We define model transformation in terms of abstract interpretation and prove the soundness of our approach. Furthermore, we develop formalisms useful for encoding model properties. This work provides a methodology for relating models of different aspects of a system and for applying modeling techniques from one system domain, such as smart power grids, to other domains, such as water distribution networks.Comment: 8 pages, 4 figures; to appear in HASE 2019 proceeding

Personalizing Student Graduation Paths Using Expressed Student Interests

This paper proposes an intelligent recommendation approach to facilitate personalized education and help students in planning their path to graduation. The goal is to identify a path that aligns with a student\u27s interests and career goals and approaches optimality with respect to one or more criteria, such as time-to-graduation or credit hours taken. The approach is illustrated and verified through application to undergraduate curricula at the Missouri University of Science and Technology

3D Printing Aids Acetabular Reconstruction in Complex Revision Hip Arthroplasty

Revision hip arthroplasty requires comprehensive appreciation of abnormal bony anatomy. Advances in radiology and manufacturing technology have made three-dimensional (3D) representation of osseous anatomy obtainable, which provide visual and tactile feedback. Such life-size 3D models were manufactured from computed tomography scans of three hip joints in two patients. The first patient had undergone multiple previous hip arthroplasties for bilateral hip infections, resulting in right-sided pelvic discontinuity and a severe left-sided posterosuperior acetabular deficiency. The second patient had a first-stage revision for infection and recurrent dislocations. Specific metal reduction protocols were used to reduce artefact. The images were imported into Materialise MIMICS 14.12®. The models were manufactured using selective laser sintering. Accurate templating was performed preoperatively. Acetabular cup, augment, buttress, and cage sizes were trialled using the models, before being adjusted, and resterilised, enhancing the preoperative decision-making process. Screw trajectory simulation was carried out, reducing the risk of neurovascular injury. With 3D printing technology, complex pelvic deformities were better evaluated and treated with improved precision. Life-size models allowed accurate surgical simulation, thus improving anatomical appreciation and preoperative planning. The accuracy and cost-effectiveness of the technique should prove invaluable as a tool to aid clinical practice

Assessment of polygenic architecture and risk prediction based on common variants across fourteen cancers

Abstract: Genome-wide association studies (GWAS) have led to the identification of hundreds of susceptibility loci across cancers, but the impact of further studies remains uncertain. Here we analyse summary-level data from GWAS of European ancestry across fourteen cancer sites to estimate the number of common susceptibility variants (polygenicity) and underlying effect-size distribution. All cancers show a high degree of polygenicity, involving at a minimum of thousands of loci. We project that sample sizes required to explain 80% of GWAS heritability vary from 60,000 cases for testicular to over 1,000,000 cases for lung cancer. The maximum relative risk achievable for subjects at the 99th risk percentile of underlying polygenic risk scores (PRS), compared to average risk, ranges from 12 for testicular to 2.5 for ovarian cancer. We show that PRS have potential for risk stratification for cancers of breast, colon and prostate, but less so for others because of modest heritability and lower incidence

Green and sustainable computing

Since its first volume in 1960, Advances in Computers has presented detailed coverage of innovations in computer hardware, software, theory, design, and applications. It has also provided contributors with a medium in which they can explore their subjects in greater depth and breadth than journal articles usually allow. As a result, many articles have become standard references that continue to be of sugnificant, lasting value in this rapidly expanding field. In-depth surveys and tutorials on new computer technologyWell-known authors and researchers in the fieldExtensive bibliographies with

Scheduled Dataflow Architecture: A Synchronous Execution Paradigm For Dataflow

Recent trends in technology are widening the performance gap between memory and processors. Multithreading has been touted as a possible solution to minimize the loss of CPU cycles due to memory latency, by executing several instruction streams simultaneously. In this paper, we propose a new multithreaded dataflow architecture that uses RISC like pipelines and control-flow like scheduling of dataflow instructions, but retains functional properties of the dataflow model. In addition, our Scheduled Dataflow architecture utilizes two separate hardware units for the execution of threads -- decoupling memory accesses from pipeline execution. We present an analytical model for the evaluation of the proposed architecture. We will discuss the impact of fine-grained vs coarse-grained threads, number of hardware contexts, and decoupling memory accesses from pipeline execution in our architecture. Keywords: Dataflow architecture, multithreading, Explicit Token Store, multiple hardware contexts ..

The Multicore Architecture

The multicore architecture has played a significant role in computer performance improvements since it was first introduced in the early 2000s [2]. It provides performance improvements due to multiple cores executing instructions concurrently supporting both instruction level parallelism and thread level parallelism. The performance improvement can be achieved at lower clock frequencies as compared to superscalar architectures, resulting in higher performance per Watt. Finally, multicore processors provide an advantage over multiprocessor systems as resources can be shared among the cores that would be duplicated on a multiprocessor system. The advantages of multicore architectures come at the expense of several challenges such as cache coherency and communication among the cores. This chapter is intended to address these architectural challenges and their potential solutions within the scope of the multicore architecture. Multicore architectures can be heterogeneous or homogeneous. In homogeneous architectures, as the name suggests, all the cores on the device are the same. In heterogeneous architectures, two or more cores on the device are different. Applications may benefit from different combinations of complex and simple cores. Different cores being used for different purposes in the design may provide a more efficient design. The benefits of each type of architecture will be articulated in this article. Cache coherency is an important challenge in the multicore architecture. One or more levels of cache are private to each core and one or more levels of cache are shared among the cores. This presents a cache coherency challenge that must be managed. Data that may be used by multiple cores may be stored or modified in one core\u27s private cache. Multiple protocols exist to resolve this issue. Different methods will be presented and compared. As the number of cores has increased, the interconnection framework has become a bottleneck in the system. Communication is necessary between the cores cache memory to ensure cache coherence. This interconnection architecture was traditionally done using a bus. As the number of cores has increased, a bus is not able to efficiently support the traffic and is limiting the performance improvement obtained by adding cores. The Network on a Chip (NoC) architecture has shown to be a more efficient interconnection mechanism that is able to provide performance improvements as the number of cores is increased. The interconnection mechanism among the cores will be discussed. Finally, to take advantage of the concurrency available from the multicore architecture, software must be developed for parallel execution. Developing and implementing software for parallel execution is much different than developing software for sequential execution. The tools and techniques used to write parallel software will also be discussed. An overview of the multicore architecture is first discussed. Design issues encountered with the multicore architecture such as cache coherency, interconnection frameworks, and designing software for parallel execution are then examined